Control Synthesis with Temporal Logic

Control Synthesis with Temporal Logic enables the design of controllers that guarantee system behaviors adhere to specified logical requirements. By utilizing temporal logic specifications, we ensure robust and verifiable control strategies for complex dynamic systems.

We focus on topics about Temporal Logic Specification Design, Automated Control Synthesis, and Real-Time Verification.

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Result

Temporal Logic Inference for Fault Detection of Switched Systems With Gaussian Process Dynamics
Gang Chen* et al.
IEEE Transactions on Automation Science and Engineering, 2021
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Result

Control/physical systems co-design with spectral temporal logic specifications and its applications to MEMS
Gang Chen, Zhaodan Kong, Longhan Xie
International Journal of Control,2024
PDF   Abstract   BibTeX